oui j'ai testé avec un quartz de 48MHz et un de 20MHz + 2 capacités de 22pF
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Il se peut que c'est là le problème. En lisant la datasheet ( qui est très compliqué à comprendre pour moi ) les quartz utilisés sont au maximum de 16MHz ??????
Et il faut utilisé PLL pour multiplier la fréquence par 4 pour avoir la fréquence maximale de 64MHz.
Quand pensez-vous ?
Voici la partie de la datasheet qui parle de ça.
2.6 PLL Frequency Multiplier
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
oscillator circuit or to clock the device up to its highest
rated frequency from the crystal oscillator. This may be
useful for customers who are concerned with EMI due
to high-frequency crystals or users who require higher
clock speeds from an internal oscillator. There are
three conditions when the PLL can be used:
• When the primary clock is HSPLL
• When the primary clock is HFINTOSC and the
selected frequency is 16 MHz
• When the primary clock is HFINTOSC and the
selected frequency is 8 MHz
2.6.1 HSPLL OSCILLATOR MODE
The HSPLL mode makes use of the HS mode oscillator
for frequencies up to 16 MHz. A PLL then multiplies the
oscillator output frequency by 4 to produce an internal
clock frequency up to 64 MHz. The PLLEN bit of the
OSCTUNE register is active only when the HFINTOSC
is the primary clock and is not available in HSPLL oscillator
mode.
j'ai Flowcode 6.1.3.2 Pro