flowcode V4 AVR
Posted: Tue Aug 31, 2010 7:02 pm
When using flowcode's out and setting the mask to use only 1 bit... why are all bits affected in the output port?
More specifically, the AVR chip has three registers that affect how the i/o port operates. As you might already know, the DDRn is the Data Direction Register for the named port, the PORTn is the port's data register of which is used to read or write data to the port, and PINn of which is used to read/write the physical pin of the port. As you may not know, the PORTn register also controls a pull-up resistor for a given pin of the port.
Here is the problem. The mask is not working for the PORTn register. In fact, the mask is only working on the DDRn register and the PORTn is "ORed" with the mask and all the other bits as well. This would hardly be called a mask.
The generated "C" code from flowcode for a mask of 6 bit to port B....
DDRB = DDRB | 0x40;
PORTB = (PORTB & 0xbf) | FCV_TEMP1;
Well the DDRB is ok but the PORTB is about to get all the data from FVC_TEMP1, meaning the PORTB is going to have some those pull-resistors set thus pulling those pins high and with an internal resistor of 20K. This is enough to pull any CMOS chip a logical high.
Instead of "OR'ing" the port, how about "AND'ing" the port register PORTB with the mask value. Then those pull-up resistors on a given port would not be affected and not mix data with pull-up resistors.
**PORTB = 0x40 & FCV_TEMP1;
It is also interesting to note that the DDRB register is also using an "OR", there should be a way to tell flowcode whether a OR or and AND should be used here, instead of just blindly stepping on a port's output as if this function is the master of the chip.
More specifically, the AVR chip has three registers that affect how the i/o port operates. As you might already know, the DDRn is the Data Direction Register for the named port, the PORTn is the port's data register of which is used to read or write data to the port, and PINn of which is used to read/write the physical pin of the port. As you may not know, the PORTn register also controls a pull-up resistor for a given pin of the port.
Here is the problem. The mask is not working for the PORTn register. In fact, the mask is only working on the DDRn register and the PORTn is "ORed" with the mask and all the other bits as well. This would hardly be called a mask.
The generated "C" code from flowcode for a mask of 6 bit to port B....
DDRB = DDRB | 0x40;
PORTB = (PORTB & 0xbf) | FCV_TEMP1;
Well the DDRB is ok but the PORTB is about to get all the data from FVC_TEMP1, meaning the PORTB is going to have some those pull-resistors set thus pulling those pins high and with an internal resistor of 20K. This is enough to pull any CMOS chip a logical high.
Instead of "OR'ing" the port, how about "AND'ing" the port register PORTB with the mask value. Then those pull-up resistors on a given port would not be affected and not mix data with pull-up resistors.
**PORTB = 0x40 & FCV_TEMP1;
It is also interesting to note that the DDRB register is also using an "OR", there should be a way to tell flowcode whether a OR or and AND should be used here, instead of just blindly stepping on a port's output as if this function is the master of the chip.