Component: ADC (MCP356X) (Analog Input)

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Author MatrixTSL
Version 1.0
Category Analog Input


ADC (MCP356X) component

An external ADC featuring 2, 4, or 8 channel 24-bit input. Capable of reading each channel independently or in differential mode. Communication using an SPI bus up to 20MHz.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_ExternalADC_MCP356X.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_ExternalADC_MCP356X.fcfx

Detailed description

No detailed description exists yet for this component

Examples

No additional examples






Macro reference

Initialise

Fc9-comp-macro.png Initialise
Confgures the SPI bus ready for communications and initialises the MCP356X device. Returns true if device is responding to commands. 
Fc9-bool-icon.png - BOOL Return


SampleADC

Fc9-comp-macro.png SampleADC
Performs a single ADC sample and returns the result as a 24-bit value 
Fc9-u8-icon.png - BYTE PositiveChannel
0=CH0 - 7=CH7, 8=GND, 9=VDD, 11=REF+, 12=REF-, 13=TP, 14=TM, 15=VCM 
Fc9-u8-icon.png - BYTE NegativeChannel
0=CH0 - 7=CH7, 8=GND, 9=VDD, 11=REF+, 12=REF-, 13=TP, 14=TM, 15=VCM 
Fc9-s32-icon.png - LONG Return


SetGainCalibration

Fc9-comp-macro.png SetGainCalibration
Allows the device offset to be entered allowing for accurate readings. 
Fc9-u32-icon.png - ULONG Gain
Default 800000 = Gain of 1X 
Fc9-void-icon.png - VOID Return


SetOffsetCalibration

Fc9-comp-macro.png SetOffsetCalibration
Allows the device offset to be entered allowing for accurate readings. 
Fc9-s32-icon.png - LONG Offset
 
Fc9-void-icon.png - VOID Return


Property reference

Fc9-prop-icon.png Properties
Fc9-conn-icon.png Device Configuration
Fc9-type-16-icon.png Device Type
 
Fc9-type-16-icon.png Device Address
These bits are fixed from the manufacturer and by default are 01. Used as Bits 6 and 7 of the command byte. Alternative bits must be requested from the manufacturer. 
Fc9-type-16-icon.png Clock Selection
 
Fc9-type-16-icon.png Sensor Bias Current
 
Fc9-type-16-icon.png ADC Bias Current
 
Fc9-type-16-icon.png AMCLK Prescaler
 
Fc9-type-16-icon.png Oversampling Ratio
 
Fc9-type-16-icon.png ADC Gain
 
Fc9-type-16-icon.png IRQ Mode
 
Fc9-conn-icon.png Connections
Fc9-type-16-icon.png Channel
SPI Channel selector 
Fc9-type-16-icon.png Prescale
Prescale option selector 
Fc9-type-5-icon.png MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. 
Fc9-type-16-icon.png MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality. 
Fc9-type-5-icon.png MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. 
Fc9-type-16-icon.png MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality. 
Fc9-type-5-icon.png CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master. 
Fc9-type-16-icon.png CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality. 
Fc9-type-5-icon.png CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.  
Fc9-type-7-icon.png Use IRQ
No: Use polling of the status register to determine when an ADC sample is complete. Yes: Use the IRQ interrupt pin to determine when an ADC sample is complete. 
Fc9-conn-icon.png Simulation
Fc9-type-7-icon.png Simulate Comms
No: Simulation is done using panel sliders. Yes: Send SPI data via API interface and show real time data using panel sliders.