This could be a bug or I've done something dumb but i cant change the SPI clock polarity. (not sure on the edge setting either)
To simplify things and remove other possible issues, like a pull up somewhere else, this testing was done with a stand alone ECIO 40P (18F4455) and running FC 5.5.2.1
Irrespective of what settings I put in the SPI properties 'SPI CLOCK Polarity', in Hardware the clock polarity is always high.
Checking the 18F4455 data sheet, these settings are set by writing to the required register.
Register SSPCON1: bit 4 (ClocKPolarity)
I may also need to change
Register SSPSTAT: bit 6 (Transmits clock select bit, i.e. edge)
If the FC properties settings are not working, could I set these via a C code box? What C code do I need to both read the existing and write a new register value ?
Backgound info: I have several SPI devices on one bus, some are quite tolerant of various SPI configurations, others need specific settings to correctly work. I seem to be getting data back that is all shifted by 1 bit...I suspect its tripping up on the how it reads/interprets the first bit.
Any thoughts?
Thanks, J.