Compile problem

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wayne millard
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Compile problem

Post by wayne millard »

Hi Matrix,

I have a compiler problem can you please find what the problem is?
The Pic is a 18F46K42


2023: INTCON2bits.INTEDG0 = 1;
^ (192) undefined identifier "INTCON2bits"
^ (196) struct/union required
Radar Velocity.c: FCM_Update_display()
2072: FCV_R_FACTOR = fround(FCV_F_FACTOR, 1);
^ (361) function declared implicit int (warning)
2180: tmr0 = 0x00;
^ (192) undefined identifier "tmr0"
Radar Velocity.c: FCM_int_call()
2220: INTCONbits.PEIE = 1;
^ (192) undefined identifier "INTCONbits"
^ (196) struct/union required
Radar Velocity.c: main()
2341: INTCON2bits.INTEDG0 = 1;
^ (192) undefined identifier "INTCON2bits"
^ (196) struct/union required
(908) exit status = 1
(908) exit status = 1

Error returned from [xc8.exe]

Thanks,
Wayne Millard
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Re: Compile problem

Post by Benj »

Thanks Wayne,

I'll investigate, please can you attach your program so we can try and replicate.
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Re: Compile problem

Post by Benj »

I've fixed numerous problems with the INT0 and IOC interrupts now on the K42 devices and pushed to the v8 update system.
2180: tmr0 = 0x00;
^ (192) undefined identifier "tmr0"
If you are accessing the TMR0 register using C code then make sure you use the register name in upper case so the compiler can recognise the register.
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wayne millard
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Re: Compile problem

Post by wayne millard »

Thanks Benj,

I still have the following problem.

Radar Velocity.c: FCM_Update_display()
2072: FCV_R_FACTOR = fround(FCV_F_FACTOR, 1);
^ (361) function declared implicit int (warning)
Radar Velocity.c: FCM_int_call()
2220: INTCONbits.PEIE = 1;
^ (192) undefined identifier "INTCONbits"
^ (196) struct/union required
(908) exit status = 1
(908) exit status = 1

Error returned from [xc8.exe]

Thanks,
Wayne Millard
Attachments
Radar Velocity.fcfx
(33.57 KiB) Downloaded 224 times
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Re: Compile problem

Post by Benj »

Hi Wayne,

The warning should be ok to be ignored and I have now fixed the compilation error for you via the update system.
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Re: Compile problem

Post by wayne millard »

Sorry Benj,

Thanks for looking into the problems your a star.

There still seems to be a problem.
Radar Velocity.c: FCM_Update_display()
2072: FCV_R_FACTOR = fround(FCV_F_FACTOR, 1);
^ (361) function declared implicit int (warning)
using updated 32-bit floating-point libraries; improved accuracy might increase code size
Radar Velocity.c: 2414: (2016) interrupt function "myisr" does not service any interrupt sources
Radar Velocity.c: 2072: (1464) number of arguments passed to function "_fround" does not match function's prototype (warning)
Non line specific message: (2020) IRQ 0 (SWINT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 1 (HLVD) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 2 (OSF) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 3 (CSW) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 4 (NVM) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 5 (SCAN) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 6 (CRC) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 7 (IOC) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 8 (INT0) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 9 (ZCD) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 10 (AD) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 11 (ADT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 12 (CMP1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 13 (SMT1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 14 (SMT1PRA) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 15 (SMT1PRW) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 16 (DMA1SCNT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 17 (DMA1DCNT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 18 (DMA1OR) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 19 (DMA1A) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 20 (SPI1RX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 21 (SPI1TX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 22 (SPI1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 23 (I2C1RX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 24 (I2C1TX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 25 (I2C1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 26 (I2C1E) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 27 (U1RX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 28 (U1TX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 29 (U1E) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 30 (U1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 31 (TMR0) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 32 (TMR1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 33 (TMR1G) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 34 (TMR2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 35 (CCP1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 37 (NCO1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 38 (CWG1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 39 (CLC1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 40 (INT1) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 41 (CMP2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 42 (DMA2SCNT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 43 (DMA2DCNT) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 44 (DMA2OR) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 45 (DMA2A) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 46 (I2C2RX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 47 (I2C2TX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 48 (I2C2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 49 (I2C2E) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 50 (U2RX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 51 (U2TX) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 52 (U2E) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 53 (U2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 54 (TMR3) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 55 (TMR3G) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 56 (TMR4) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 57 (CCP2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 59 (CWG2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 60 (CLC2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 61 (INT2) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 70 (TMR5) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 71 (TMR5G) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 72 (TMR6) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 73 (CCP3) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 74 (CWG3) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 75 (CLC3) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 80 (CCP4) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Non line specific message: (2020) IRQ 81 (CLC4) in vector table @ 0x8 is unassigned, will be programmed with the address of a RESET instruction (warning)
Error returned from [xc8.exe]
C:\Program Files (x86)\Flowcode\Compilers\pic\batch\pic_xc8_comp.bat reported error code 1
(908) exit status = 1
(908) exit status = 1


Thanks
Wayne Millard
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Re: Compile problem

Post by Benj »

Hi Wayne,

Right I've solved the interrupt vector issue now but the fround is still a problem. Investigating this now. Do you need this?

I've pushed the latest definitions so let me know how you get on. I am interested as to if the interrupts are working ok.
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wayne millard
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Re: Compile problem

Post by wayne millard »

Hi Benj,

Thanks for looking at the problem i don't need it to be fixed intel after christmas when i can do the hardware.

Thanks
Wayne Millard
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