Difference between revisions of "Component: IO Expander (BL0155) (E-blocks 2)"
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− | + | {| style="width:50%" | |
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− | {| | ||
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− | | width="20%" style="color: gray;" | Author | + | | width="20%" style="color:gray;" | Author |
| Matrix TSL | | Matrix TSL | ||
|- | |- | ||
− | | width="20%" style="color: gray;" | Version | + | | width="20%" style="color:gray;" | Version |
− | | 1.0 | + | | 1.0 |
|- | |- | ||
− | | width="20%" style="color: gray;" | Category | + | | width="20%" style="color:gray;" | Category |
| E-blocks 2 | | E-blocks 2 | ||
|} | |} | ||
− | + | ==IO Expander component== | |
− | == | ||
Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection. | Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection. | ||
− | == | + | ==Component Source Code== |
− | |||
+ | Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx] | ||
− | = | + | Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx] |
− | === | + | ==Detailed description== |
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− | '' | + | ''No detailed description exists yet for this component'' |
− | + | ==Examples== | |
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+ | ''<span style="color:red;">No additional examples</span>'' | ||
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− | === | + | ==Macro reference== |
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− | Configures the | + | ===ConfigureInversion=== |
+ | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | ||
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ConfigureInversion''' | ||
+ | |- | ||
+ | | colspan="2" | Configures the pin inversion for the two ports. Disabled on all pins by default. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | PortA | ||
+ | |- | ||
+ | | colspan="2" | Port A inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | PortB | ||
+ | |- | ||
+ | | colspan="2" | Port B inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
− | :[[ | + | ===ConfigurePullups=== |
− | ::0= | + | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" |
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ConfigurePullups''' | ||
+ | |- | ||
+ | | colspan="2" | Configures the pullups for the two ports. Disabled on all pins by default. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | PortA | ||
+ | |- | ||
+ | | colspan="2" | Port A pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | PortB | ||
+ | |- | ||
+ | | colspan="2" | Port B pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
− | |||
− | :[[ | + | ===Initialise=== |
− | :: | + | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" |
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise''' | ||
+ | |- | ||
+ | | colspan="2" | | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | ''' | + | ===ReadPort=== |
+ | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | ||
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadPort''' | ||
+ | |- | ||
+ | | colspan="2" | Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Port | ||
+ | |- | ||
+ | | colspan="2" | 0=PortA, 1=PortB | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Mask | ||
+ | |- | ||
+ | | colspan="2" | Allows port bits to be modified without effecting other bits, 255 = write full port. | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
+ | ===ReadPortPin=== | ||
+ | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | ||
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadPortPin''' | ||
+ | |- | ||
+ | | colspan="2" | Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Port | ||
+ | |- | ||
+ | | colspan="2" | 0=PortA, 1=PortB | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Pin | ||
+ | |- | ||
+ | | colspan="2" | Port pin to read. Range: 0-7 | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
− | |||
− | + | ===ReadRegister=== | |
+ | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | ||
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadRegister''' | ||
+ | |- | ||
+ | | colspan="2" | Reads an 8-bit value from a register on the I/O expander device. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Address | ||
+ | |- | ||
+ | | colspan="2" | Register address to write to. Range: 0-15 | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
− | :[[ | + | ===WritePort=== |
− | : | + | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" |
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WritePort''' | ||
+ | |- | ||
+ | | colspan="2" | Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Port | ||
+ | |- | ||
+ | | colspan="2" | 0=PortA, 1=PortB | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Mask | ||
+ | |- | ||
+ | | colspan="2" | Allows port bits to be modified without effecting other bits, 255 = write full port. | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Value | ||
+ | |- | ||
+ | | colspan="2" | Value to write. Range 0-255 | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
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+ | ===WritePortPin=== | ||
+ | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | ||
+ | |- | ||
+ | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | ||
+ | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WritePortPin''' | ||
+ | |- | ||
+ | | colspan="2" | Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value. | ||
+ | |- | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Port | ||
+ | |- | ||
+ | | colspan="2" | 0=PortA, 1=PortB | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Pin | ||
+ | |- | ||
+ | | colspan="2" | Port pin to read. Range: 0-7 | ||
+ | |- | ||
+ | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | ||
+ | | width="90%" | Value | ||
+ | |- | ||
+ | | colspan="2" | Value to output on the selected pin. Range: 0-1 | ||
+ | |- | ||
+ | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | ||
+ | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | ||
+ | |} | ||
− | |||
− | + | ===WriteRegister=== | |
− | + | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |
− | + | |- | |
− | === | + | | width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] |
− | + | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WriteRegister''' | |
− | + | |- | |
− | + | | colspan="2" | Writes an 8-bit value to a register on the I/O expander device. | |
− | + | |- | |
− | :[[ | + | |- |
− | :: | + | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE |
− | + | | width="90%" | Address | |
− | + | |- | |
− | ''' | + | | colspan="2" | Register address to write to. Range: 0-15 |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | |
− | + | | width="90%" | Value | |
− | + | |- | |
− | + | | colspan="2" | Value to write. Range: 0-255 | |
− | Writes an 8-bit value to a register on the I/O expander device. | + | |- |
− | + | | width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |
− | + | | width="90%" style="border-top: 2px solid #000;" | ''Return'' | |
− | + | |} | |
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==Property reference== | ==Property reference== | ||
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− | + | {| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |
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− | + | | width="10%" align="center" style="background-color:#D8C9D8;" | [[File:Fc9-prop-icon.png]] | |
− | + | | width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Properties''' | |
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− | + | | width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]] | |
− | + | | width="90%" style="background-color:#EAE1EA; color:#4B008D;" | SPI Communications | |
− | Prescale option selector | + | |- |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |
− | + | | width="90%" | External Address | |
− | + | |- | |
− | + | | colspan="2" | Selects the value of the three address pins for the MCP23S17. | |
− | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | + | |- |
− | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |
− | + | | width="90%" | Channel | |
− | + | |- | |
− | + | | colspan="2" | SPI Channel selector | |
− | + | |- | |
− | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] |
− | + | | width="90%" | Prescale | |
− | + | |- | |
− | + | | colspan="2" | Prescale option selector | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |
− | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | + | | width="90%" | MOSI |
− | + | |- | |
− | + | | colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |
− | + | | width="90%" | MOSI Remap Pin | |
− | Chip Select / Slave Select Pin | + | |- |
− | + | | colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality. | |
− | Master Mode: General purpose output pin used to select the remote SPI device. | + | |- |
− | + | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |
− | Slave Mode: Hardware chip select pin input used to select the SPI device. | + | | width="90%" | MISO |
− | + | |- | |
− | + | | colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |
− | + | | width="90%" | MISO Remap Pin | |
− | + | |- | |
− | + | | colspan="2" | Select which the target pin to assign the MISO hardware pin functionality. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |
− | + | | width="90%" | CLK | |
− | + | |- | |
− | + | | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |
− | + | | width="90%" | CLK Remap Pin | |
− | + | |- | |
− | + | | colspan="2" | Select which the target pin to assign the CLK hardware pin functionality. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |
− | + | | width="90%" | CS / SS | |
− | + | |- | |
− | + | | colspan="2" | Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device. | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |
− | + | | width="90%" | Reset Pin | |
− | + | |- | |
− | + | | colspan="2" | | |
− | + | |- | |
− | + | | width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]] | |
− | + | | width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation | |
− | + | |- | |
− | + | |- | |
− | + | | width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | |
− | + | | width="90%" | Simulate Comms | |
+ | |- | ||
+ | | colspan="2" | | ||
+ | |} |
Latest revision as of 10:26, 20 October 2023
Author | Matrix TSL |
Version | 1.0 |
Category | E-blocks 2 |
Contents
IO Expander component
Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection.
Component Source Code
Please click here to download the component source project: FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx
Detailed description
No detailed description exists yet for this component
Examples
No additional examples
Macro reference
ConfigureInversion
ConfigurePullups
Initialise
![]() |
Initialise |
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Return |
ReadPort
ReadPortPin
ReadRegister
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ReadRegister |
Reads an 8-bit value from a register on the I/O expander device. | |
![]() |
Address |
Register address to write to. Range: 0-15 | |
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Return |
WritePort
WritePortPin
WriteRegister
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WriteRegister |
Writes an 8-bit value to a register on the I/O expander device. | |
![]() |
Address |
Register address to write to. Range: 0-15 | |
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Value |
Value to write. Range: 0-255 | |
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Return |