Component: RF Transceiver (nRF24L01) (Wireless): Difference between revisions
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| width="20%" style="color:gray;" | Version | | width="20%" style="color:gray;" | Version | ||
| | | 9.0 | ||
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| width="20%" style="color:gray;" | Category | | width="20%" style="color:gray;" | Category | ||
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A simple RF communications module based on the 2.4GHz nRF24L01 transceivermodules. | A simple RF communications module based on the 2.4GHz nRF24L01 transceivermodules. | ||
== | ==Version information== | ||
Library Version, Component Version, Date, Author, Info | |||
9, 9.0, 08-11-24, MW, added missing icon | |||
==Detailed description== | ==Detailed description== | ||
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===CheckRX=== | ===CheckRX=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''CheckRX''' | ||
|- | |- | ||
| colspan="2" | Check the Rx FIFO status register for any new data. Returns 0 = No data Returns 1 = New data available | | colspan="2" | Check the Rx FIFO status register for any new data. Returns 0 = No data Returns 1 = New data available | ||
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===FlushRx=== | ===FlushRx=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''FlushRx''' | ||
|- | |- | ||
| colspan="2" | Tells the RF module to flush the contents of the receive buffer. Returns the status from sending the command. | | colspan="2" | Tells the RF module to flush the contents of the receive buffer. Returns the status from sending the command. | ||
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===FlushTx=== | ===FlushTx=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''FlushTx''' | ||
|- | |- | ||
| colspan="2" | Tells the RF module to flush the contents of the transmit buffer. Returns the status from sending the command. | | colspan="2" | Tells the RF module to flush the contents of the transmit buffer. Returns the status from sending the command. | ||
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===Initialise=== | ===Initialise=== | ||
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|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Initialise''' | ||
|- | |- | ||
| colspan="2" | Starts up and configures the RF module ready for use. The macro will return a value greater then 0 if the module has been started correctly, otherwise the macro will return a 0. | | colspan="2" | Starts up and configures the RF module ready for use. The macro will return a value greater then 0 if the module has been started correctly, otherwise the macro will return a 0. | ||
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===ReadRegister=== | ===ReadRegister=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadRegister''' | ||
|- | |- | ||
| colspan="2" | Reads a single bytes from the selected register. Directly returns the value read back from the register. | | colspan="2" | Reads a single bytes from the selected register. Directly returns the value read back from the register. | ||
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===ReadRxArray=== | ===ReadRxArray=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadRxArray''' | ||
|- | |- | ||
| colspan="2" | Reads an array of bytes back from the local Rx buffer. | | colspan="2" | Reads an array of bytes back from the local Rx buffer. | ||
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===ReadRxByte=== | ===ReadRxByte=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadRxByte''' | ||
|- | |- | ||
| colspan="2" | Reads a single byte back from the local Rx buffer. | | colspan="2" | Reads a single byte back from the local Rx buffer. | ||
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===ReadRxFifo=== | ===ReadRxFifo=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''ReadRxFifo''' | ||
|- | |- | ||
| colspan="2" | Reads the Rx FIFO buffer into a local buffer. Use the ReadBuffer/ReadArray macros to collect the individual data bytes. | | colspan="2" | Reads the Rx FIFO buffer into a local buffer. Use the ReadBuffer/ReadArray macros to collect the individual data bytes. | ||
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===SetRxMode=== | ===SetRxMode=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''SetRxMode''' | ||
|- | |- | ||
| colspan="2" | Sets up the module up ready to receive data. Assigns the 5-byte pipe listen address. | | colspan="2" | Sets up the module up ready to receive data. Assigns the 5-byte pipe listen address. | ||
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===SetTxMode=== | ===SetTxMode=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''SetTxMode''' | ||
|- | |- | ||
| colspan="2" | Sets the module up ready to transmit data. Assigns the 5-byte pipe transmit address. | | colspan="2" | Sets the module up ready to transmit data. Assigns the 5-byte pipe transmit address. | ||
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===WriteRegister=== | ===WriteRegister=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WriteRegister''' | ||
|- | |- | ||
| colspan="2" | Writes a single byte to the selected register. Returns the status of the write command. | | colspan="2" | Writes a single byte to the selected register. Returns the status of the write command. | ||
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===WriteTxArray=== | ===WriteTxArray=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WriteTxArray''' | ||
|- | |- | ||
| colspan="2" | Writes an array of bytes to the local Tx buffer. | | colspan="2" | Writes an array of bytes to the local Tx buffer. | ||
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===WriteTxByte=== | ===WriteTxByte=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WriteTxByte''' | ||
|- | |- | ||
| colspan="2" | Writes a single byte to the local Tx buffer. | | colspan="2" | Writes a single byte to the local Tx buffer. | ||
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===WriteTxFifo=== | ===WriteTxFifo=== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''WriteTxFifo''' | ||
|- | |- | ||
| colspan="2" | Writes the contents of the local Tx buffer to the Transmit FIFO and transmits. Returns 1 if transmission was sucessful. | | colspan="2" | Writes the contents of the local Tx buffer to the Transmit FIFO and transmits. Returns 1 if transmission was sucessful. | ||
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==Property reference== | ==Property reference== | ||
{| class="wikitable | {| class="mtx-class-macrotable wikitable" | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-prop-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Properties''' | ||
|- | |- | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | RF Settings | ||
|- | |- | ||
|- | |- | ||
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| colspan="2" | Sets the data throughput rate. | | colspan="2" | Sets the data throughput rate. | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | Connections | ||
|- | |- | ||
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| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | | colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | ||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | MOSI Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality. | |||
|- | |- | ||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | | colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | ||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | MISO Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the MISO hardware pin functionality. | |||
|- | |- | ||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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|- | |- | ||
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | | colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | ||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | CLK Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the CLK hardware pin functionality. | |||
|- | |- | ||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | | width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | ||
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| colspan="2" | Chip enable, configures RX or TX mode | | colspan="2" | Chip enable, configures RX or TX mode | ||
|- | |- | ||
| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | Simulation | ||
|- | |- | ||
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| colspan="2" | | | colspan="2" | | ||
|} | |} | ||
==Component Source Code== | |||
Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_nRF24L01.fcfx FC_Comp_Source_nRF24L01.fcfx] | |||
Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_nRF24L01.fcfx FC_Comp_Source_nRF24L01.fcfx] | |||
Latest revision as of 14:37, 13 July 2026
| Author | Matrix Ltd. |
| Version | 9.0 |
| Category | Wireless |
RF Transceiver (nRF24L01) component
A simple RF communications module based on the 2.4GHz nRF24L01 transceivermodules.
Version information
Library Version, Component Version, Date, Author, Info 9, 9.0, 08-11-24, MW, added missing icon
Detailed description
No detailed description exists yet for this component
Examples
Example program transmitting a count value, echoing the count and TX status to the UART for debugging.
Example program receiving a value, echoing any received values to the UART for debugging.
Macro reference
CheckRX
| CheckRX | |
| Check the Rx FIFO status register for any new data. Returns 0 = No data Returns 1 = New data available | |
| Return | |
FlushRx
| FlushRx | |
| Tells the RF module to flush the contents of the receive buffer. Returns the status from sending the command. | |
| Return | |
FlushTx
| FlushTx | |
| Tells the RF module to flush the contents of the transmit buffer. Returns the status from sending the command. | |
| Return | |
Initialise
ReadRegister
| ReadRegister | |
| Reads a single bytes from the selected register. Directly returns the value read back from the register. | |
| Reg | |
| Register address to access | |
| Return | |
ReadRxArray
| ReadRxArray | |
| Reads an array of bytes back from the local Rx buffer. | |
| Data | |
| Byte array to store the received data | |
| NumBytes | |
| Range: 1-32 | |
| Return | |
ReadRxByte
| ReadRxByte | |
| Reads a single byte back from the local Rx buffer. | |
| Index | |
| Byte to read, range 0 - 31 | |
| Return | |
ReadRxFifo
| ReadRxFifo | |
| Reads the Rx FIFO buffer into a local buffer. Use the ReadBuffer/ReadArray macros to collect the individual data bytes. | |
| Return | |
SetRxMode
SetTxMode
WriteRegister
| WriteRegister | |
| Writes a single byte to the selected register. Returns the status of the write command. | |
| Reg | |
| Register address to access | |
| Value | |
| Return | |
WriteTxArray
| WriteTxArray | |
| Writes an array of bytes to the local Tx buffer. | |
| Data | |
| Byte array to write. | |
| NumBytes | |
| Range: 1-32 | |
| Return | |
WriteTxByte
| WriteTxByte | |
| Writes a single byte to the local Tx buffer. | |
| Index | |
| Byte to read, range 0 - 31 | |
| Value | |
| Return | |
WriteTxFifo
| WriteTxFifo | |
| Writes the contents of the local Tx buffer to the Transmit FIFO and transmits. Returns 1 if transmission was sucessful. | |
| Return | |
Property reference
Component Source Code
Please click here to download the component source project: FC_Comp_Source_nRF24L01.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_nRF24L01.fcfx