Component: DAC Dual (MCP49x2) (Analog Output): Difference between revisions
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| width="20%" style="color: gray;" | Author | | width="20%" style="color:gray;" | Author | ||
| Matrix TSL | | Matrix TSL | ||
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| width="20%" style="color: gray;" | Version | | width="20%" style="color:gray;" | Version | ||
| 1.0 | | 1.0 | ||
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| width="20%" style="color: gray;" | Category | | width="20%" style="color:gray;" | Category | ||
| Analog Output | | Analog Output | ||
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==DAC Dual (MCP49x2) component== | |||
Component to drive a dual digital to analogue converter (DAC) IC from Microchip via an SPI interface. Compatible with MCP4902 (8-Bit), MCP4912 (10-Bit) and MCP4922 (12-Bit) devices. | |||
== | ==Component Source Code== | ||
Please click here to download the component source project: [https://www.flowcode.co.uk/wiki/componentsource/FC_Comp_Source_DAC_MCP49x2.fcfx FC_Comp_Source_DAC_MCP49x2.fcfx] | |||
Please click here to view the component source code (Beta): [https://www.flowcode.co.uk/FlowchartView/?wfile=componentsource/FC_Comp_Source_DAC_MCP49x2.fcfx FC_Comp_Source_DAC_MCP49x2.fcfx] | |||
== | ==Detailed description== | ||
''No detailed description exists yet for this component'' | |||
==Examples== | |||
<span style=" | ''<span style="color:red;">No additional examples</span>'' | ||
==Macro reference== | |||
===ControlPins=== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ControlPins''' | |||
|- | |||
| colspan="2" | Allows Shutdown (SHDN) and Latch (LDAC) pins to be controlled directly if enabled. | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-bool-icon.png]] - BOOL | |||
| width="90%" | Shutdown | |||
|- | |||
| colspan="2" | 0 = Shutdown Device, 1 = Device Active | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-bool-icon.png]] - BOOL | |||
| width="90%" | Latch | |||
|- | |||
| colspan="2" | 0 = Data output driven from DAC register, 1 = Data output locked | |||
|- | |||
| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |||
| width="90%" style="border-top: 2px solid #000;" | ''Return'' | |||
|} | |||
===Disable=== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Disable''' | |||
|- | |||
| colspan="2" | Disables the DAC output. | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | |||
| width="90%" | Channel | |||
|- | |||
| colspan="2" | 0=DAC Channel 0 , 1=DAC Channel 1 | |||
|- | |||
| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |||
| width="90%" style="border-top: 2px solid #000;" | ''Return'' | |||
|} | |||
===Enable=== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Enable''' | |||
|- | |||
| colspan="2" | Enables the DAC Output. | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | |||
| width="90%" | Channel | |||
|- | |||
| colspan="2" | 0=DAC Channel 0 , 1=DAC Channel 1 | |||
|- | |||
| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |||
| width="90%" style="border-top: 2px solid #000;" | ''Return'' | |||
|} | |||
===Initialise=== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise''' | |||
|- | |||
| colspan="2" | Configures the SPI peripheral ready for communications and initialises the internal variables. DAC needs to be enabled before any output voltage can be generated. | |||
|- | |||
|- | |||
| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |||
| width="90%" style="border-top: 2px solid #000;" | ''Return'' | |||
|} | |||
===SetOutput=== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''SetOutput''' | |||
|- | |||
| colspan="2" | Sets the output voltage of the DAC 8-Bit: Range 0-255 10-Bit: Range 0-1023 12-Bit: Range 0-4095 | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-u8-icon.png]] - BYTE | |||
| width="90%" | Channel | |||
|- | |||
| colspan="2" | 0=DAC Channel 0 , 1=DAC Channel 1 | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-u16-icon.png]] - UINT | |||
| width="90%" | DAC_Value | |||
|- | |||
| colspan="2" | The value to output to the DAC | |||
|- | |||
| width="10%" align="center" style="border-top: 2px solid #000;" | [[File:Fc9-void-icon.png]] - VOID | |||
| width="90%" style="border-top: 2px solid #000;" | ''Return'' | |||
|} | |||
==Property reference== | |||
{| class="wikitable" style="width:60%; background-color:#FFFFFF;" | |||
|- | |||
| width="10%" align="center" style="background-color:#D8C9D8;" | [[File:Fc9-prop-icon.png]] | |||
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Properties''' | |||
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | |- | ||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | DAC IC | |||
|- | |||
| colspan="2" | Selects which DAC IC is connected and therefore the bit depth available. | |||
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | |- | ||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | Gain Option | |||
|- | |||
| colspan="2" | Selects the maximum reference value for the DAC | |||
|- | |||
SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | | width="10%" align="center" | [[File:Fc9-type-15-icon.png]] | ||
| width="90%" | Vref Pin Voltage | |||
|- | |||
| colspan="2" | The reference voltage applied to the VREF pin. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-15-icon.png]] | |||
Chip Select / Slave Select Pin | | width="90%" | Vref Voltage | ||
|- | |||
Master Mode: General purpose output pin used to select the remote SPI device. | | colspan="2" | Reference Voltage, Used to calculate the Voltage resolution. | ||
|- | |||
Slave Mode: Hardware chip select pin input used to select the SPI device. | | width="10%" align="center" | [[File:Fc9-type-21-icon.png]] | ||
| width="90%" | Steps | |||
|- | |||
| colspan="2" | Number of discrete output states available from the DAC. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-14-icon.png]] | |||
Allows the SHDN pin to be driven from an output pin on the microcontroller. | | width="90%" | Control Bits | ||
|- | |||
If not used then tie the SHDN pin to VCC to allow the DAC to function. | | colspan="2" | Number of digital control bits | ||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-10-icon.png]] | |||
| width="90%" | Resolution | |||
|- | |||
| colspan="2" | Maximum output resolution based on number of control bits. | |||
Allows the LDAC pin to be driven from an output pin on the microcontroller. | |- | ||
| width="10%" align="center" | [[File:Fc9-type-15-icon.png]] | |||
If not used then tie the LDAC pin to GND to allow the DAC to function. | | width="90%" | Voltage Resolution | ||
|- | |||
| colspan="2" | Specifies the Resolution per digital bit in terms of Voltage. | |||
|- | |||
| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]] | |||
| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | SPI Connections | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | Channel | |||
|- | |||
| colspan="2" | SPI Channel selector | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | Prescale | |||
|- | |||
| colspan="2" | Prescale option selector | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |||
| width="90%" | MOSI | |||
|- | |||
| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | MOSI Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |||
| width="90%" | MISO | |||
|- | |||
| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | MISO Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the MISO hardware pin functionality. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |||
| width="90%" | CLK | |||
|- | |||
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]] | |||
| width="90%" | CLK Remap Pin | |||
|- | |||
| colspan="2" | Select which the target pin to assign the CLK hardware pin functionality. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]] | |||
| width="90%" | CS / SS | |||
|- | |||
| colspan="2" | Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | |||
| width="90%" | Use SHDN Pin | |||
|- | |||
| colspan="2" | Allows the SHDN pin to be driven from an output pin on the microcontroller. If not used then tie the SHDN pin to VCC to allow the DAC to function. | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | |||
| width="90%" | Use LDAC Pin | |||
|- | |||
| colspan="2" | Allows the LDAC pin to be driven from an output pin on the microcontroller. If not used then tie the LDAC pin to GND to allow the DAC to function. | |||
|- | |||
| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]] | |||
| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation | |||
|- | |||
|- | |||
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]] | |||
| width="90%" | Simulate Comms | |||
|- | |||
| colspan="2" | | |||
|} | |||
Latest revision as of 13:09, 7 February 2023
| Author | Matrix TSL |
| Version | 1.0 |
| Category | Analog Output |
DAC Dual (MCP49x2) component
Component to drive a dual digital to analogue converter (DAC) IC from Microchip via an SPI interface. Compatible with MCP4902 (8-Bit), MCP4912 (10-Bit) and MCP4922 (12-Bit) devices.
Component Source Code
Please click here to download the component source project: FC_Comp_Source_DAC_MCP49x2.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_DAC_MCP49x2.fcfx
Detailed description
No detailed description exists yet for this component
Examples
No additional examples
Macro reference
ControlPins
Disable
| Disable | |
| Disables the DAC output. | |
| Channel | |
| 0=DAC Channel 0 , 1=DAC Channel 1 | |
| Return | |
Enable
| Enable | |
| Enables the DAC Output. | |
| Channel | |
| 0=DAC Channel 0 , 1=DAC Channel 1 | |
| Return | |
Initialise
| Initialise | |
| Configures the SPI peripheral ready for communications and initialises the internal variables. DAC needs to be enabled before any output voltage can be generated. | |
| Return | |
SetOutput