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''<span style="color:red;">No additional examples</span>''
''<span style="color:red;">No additional examples</span>''




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===ConfigureInversion===
===ConfigureInversion===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
|-
|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ConfigureInversion'''
| width="90%" class="mtx-class-macrohead" | '''ConfigureInversion'''
|-
|-
| colspan="2" | Configures the pin inversion for the two ports.  Disabled on all pins by default.&nbsp;
| colspan="2" | Configures the pin inversion for the two ports.  Disabled on all pins by default.&nbsp;
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===ConfigurePullups===
===ConfigurePullups===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
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|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ConfigurePullups'''
| width="90%" class="mtx-class-macrohead" | '''ConfigurePullups'''
|-
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| colspan="2" | Configures the pullups for the two ports. Disabled on all pins by default.&nbsp;
| colspan="2" | Configures the pullups for the two ports. Disabled on all pins by default.&nbsp;
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===Initialise===
===Initialise===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
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| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Initialise'''
| width="90%" class="mtx-class-macrohead" | '''Initialise'''
|-
|-
| colspan="2" | &nbsp;
| colspan="2" | &nbsp;
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===ReadPort===
===ReadPort===
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{| class="mtx-class-macrotable wikitable"
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|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadPort'''
| width="90%" class="mtx-class-macrohead" | '''ReadPort'''
|-
|-
| colspan="2" | Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value.&nbsp;
| colspan="2" | Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value.&nbsp;
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===ReadPortPin===
===ReadPortPin===
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{| class="mtx-class-macrotable wikitable"
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| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadPortPin'''
| width="90%" class="mtx-class-macrohead" | '''ReadPortPin'''
|-
|-
| colspan="2" | Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin.&nbsp;
| colspan="2" | Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin.&nbsp;
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===ReadRegister===
===ReadRegister===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
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|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''ReadRegister'''
| width="90%" class="mtx-class-macrohead" | '''ReadRegister'''
|-
|-
| colspan="2" | Reads an 8-bit value from a register on the I/O expander device.&nbsp;
| colspan="2" | Reads an 8-bit value from a register on the I/O expander device.&nbsp;
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===WritePort===
===WritePort===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
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|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WritePort'''
| width="90%" class="mtx-class-macrohead" | '''WritePort'''
|-
|-
| colspan="2" | Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value.&nbsp;
| colspan="2" | Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value.&nbsp;
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===WritePortPin===
===WritePortPin===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
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|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WritePortPin'''
| width="90%" class="mtx-class-macrohead" | '''WritePortPin'''
|-
|-
| colspan="2" | Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value. &nbsp;
| colspan="2" | Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value. &nbsp;
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===WriteRegister===
===WriteRegister===
{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
|-
|-
| width="10%" align="center" style="background-color:#D8C9D8;" align="center" | [[File:Fc9-comp-macro.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''WriteRegister'''
| width="90%" class="mtx-class-macrohead" | '''WriteRegister'''
|-
|-
| colspan="2" | Writes an 8-bit value to a register on the I/O expander device.&nbsp;
| colspan="2" | Writes an 8-bit value to a register on the I/O expander device.&nbsp;
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==Property reference==
==Property reference==


{| class="wikitable" style="width:60%; background-color:#FFFFFF;"
{| class="mtx-class-macrotable wikitable"
|-
|-
| width="10%" align="center" style="background-color:#D8C9D8;" | [[File:Fc9-prop-icon.png]]
| width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-prop-icon.png]]
| width="90%" style="background-color:#D8C9D8; color:#4B008D;" | '''Properties'''  
| width="90%" class="mtx-class-macrohead" | '''Properties'''  
|-
|-
|-
|-
| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | SPI Communications
| width="90%" class="mtx-class-propfolder" | SPI Communications
|-
|-
|-
|-
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|-
|-
| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.&nbsp;
| colspan="2" | SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode.&nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
| width="90%" | MOSI Remap Pin
|-
| colspan="2" | Select which the target pin to assign the MOSI hardware pin functionality.&nbsp;
|-
|-
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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|-
|-
| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.&nbsp;
| colspan="2" | SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode.&nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
| width="90%" | MISO Remap Pin
|-
| colspan="2" | Select which the target pin to assign the MISO hardware pin functionality.&nbsp;
|-
|-
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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|-
|-
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.&nbsp;
| colspan="2" | SPI Clock Pin CLK - The Clock signal is driven by the SPI master.&nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
| width="90%" | CLK Remap Pin
|-
| colspan="2" | Select which the target pin to assign the CLK hardware pin functionality.&nbsp;
|-
|-
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
| width="10%" align="center" | [[File:Fc9-type-5-icon.png]]
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| colspan="2" | &nbsp;
| colspan="2" | &nbsp;
|-
|-
| width="10%" align="center" style="background-color:#EAE1EA;" | [[File:Fc9-conn-icon.png]]
| width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]]
| width="90%" style="background-color:#EAE1EA; color:#4B008D;" | Simulation
| width="90%" class="mtx-class-propfolder" | Simulation
|-
|-
| width="10%" align="center" | [[File:Fc9-type-10-icon.png]]
| width="90%" | Label
|-
| colspan="2" | &nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
| width="90%" | Show Comms Flasher
|-
| colspan="2" | &nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
| width="90%" | Scope Traces
|-
|-
| colspan="2" | Selects if the scope traces are automatically generated or not&nbsp;
|-
|-
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
| width="10%" align="center" | [[File:Fc9-type-7-icon.png]]
| width="90%" | Console Data
| width="90%" | Simulate Comms
|-
| colspan="2" | Selects if the console data is automatically generated or not&nbsp;
|-
| width="10%" align="center" | [[File:Fc9-type-16-icon.png]]
| width="90%" | API
|-
|-
| colspan="2" | &nbsp;
| colspan="2" | &nbsp;
|}
|}

Latest revision as of 14:37, 13 July 2026

Author Matrix TSL
Version 1.0
Category E-blocks 2


IO Expander component

Provides 16 digital input/output pins arranged into two 8-bit E-block 2 ports using a SPI bus connection.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_EBlocks2_IOEXP_BL0155.fcfx

Detailed description

No detailed description exists yet for this component

Examples

No additional examples








Macro reference

ConfigureInversion

ConfigureInversion
Configures the pin inversion for the two ports. Disabled on all pins by default. 
- BYTE PortA
Port A inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
- BYTE PortB
Port B inversion sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
- VOID Return


ConfigurePullups

ConfigurePullups
Configures the pullups for the two ports. Disabled on all pins by default. 
- BYTE PortA
Port A pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
- BYTE PortB
Port B pull ups sent as an 8-bit value, 0 = Disabled, 1 = Enabled 
- VOID Return


Initialise

Initialise
 
- VOID Return


ReadPort

ReadPort
Reads a value to one of the ports with a mask. Configures the masked bits to be inputs before reading the input value. 
- BYTE Port
0=PortA, 1=PortB 
- BYTE Mask
Allows port bits to be modified without effecting other bits, 255 = write full port. 
- BYTE Return


ReadPortPin

ReadPortPin
Reads a single port pin from one of the ports. Configures the pins to be an input before reading the input value. Returns 0 or 1 corresponding to the value on the port pin. 
- BYTE Port
0=PortA, 1=PortB 
- BYTE Pin
Port pin to read. Range: 0-7 
- BYTE Return


ReadRegister

ReadRegister
Reads an 8-bit value from a register on the I/O expander device. 
- BYTE Address
Register address to write to. Range: 0-15 
- BYTE Return


WritePort

WritePort
Writes a value to one of the ports with a mask. Configures the masked bits to be outputs before writing the output value. 
- BYTE Port
0=PortA, 1=PortB 
- BYTE Mask
Allows port bits to be modified without effecting other bits, 255 = write full port. 
- BYTE Value
Value to write. Range 0-255 
- VOID Return


WritePortPin

WritePortPin
Writes a single port pin on one of the ports. Configures the pins to be an output before writing the input value.  
- BYTE Port
0=PortA, 1=PortB 
- BYTE Pin
Port pin to read. Range: 0-7 
- BYTE Value
Value to output on the selected pin. Range: 0-1 
- VOID Return


WriteRegister

WriteRegister
Writes an 8-bit value to a register on the I/O expander device. 
- BYTE Address
Register address to write to. Range: 0-15 
- BYTE Value
Value to write. Range: 0-255 
- VOID Return


Property reference

Properties
SPI Communications
External Address
Selects the value of the three address pins for the MCP23S17. 
Channel
SPI Channel selector 
Prescale
Prescale option selector 
MOSI
SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. 
MOSI Remap Pin
Select which the target pin to assign the MOSI hardware pin functionality. 
MISO
SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. 
MISO Remap Pin
Select which the target pin to assign the MISO hardware pin functionality. 
CLK
SPI Clock Pin CLK - The Clock signal is driven by the SPI master. 
CLK Remap Pin
Select which the target pin to assign the CLK hardware pin functionality. 
CS / SS
Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device.  
Reset Pin
 
Simulation
Simulate Comms