Component: DDS DAC (AD9834/AD9833) (AD9834/AD9833) (Analog Output): Difference between revisions
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===DisableOutput=== | ===DisableOutput=== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''DisableOutput''' | ||
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| colspan="2" | Disables the DDS output (puts device in sleep mode). | | colspan="2" | Disables the DDS output (puts device in sleep mode). | ||
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===EnableOutput=== | ===EnableOutput=== | ||
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| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''EnableOutput''' | ||
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| colspan="2" | Enables the DDS output. | | colspan="2" | Enables the DDS output. | ||
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===Initialise=== | ===Initialise=== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Initialise''' | ||
|- | |- | ||
| colspan="2" | Initializes the SPI bus and resets the DDS device. Call this once at startup. | | colspan="2" | Initializes the SPI bus and resets the DDS device. Call this once at startup. | ||
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===Reset=== | ===Reset=== | ||
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| width="10%" align="center" | | width="10%" align="center" class="mtx-class-macrohead" | [[File:Fc9-comp-macro.png]] | ||
| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Reset''' | ||
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| colspan="2" | Resets the DDS device. This clears all registers and stops output. | | colspan="2" | Resets the DDS device. This clears all registers and stops output. | ||
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===SetFrequency=== | ===SetFrequency=== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''SetFrequency''' | ||
|- | |- | ||
| colspan="2" | Sets the output frequency in Hz. Frequency range depends on clock frequency (typically 0 Hz to ClockFreq/2). | | colspan="2" | Sets the output frequency in Hz. Frequency range depends on clock frequency (typically 0 Hz to ClockFreq/2). | ||
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===SetPhase=== | ===SetPhase=== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''SetPhase''' | ||
|- | |- | ||
| colspan="2" | Sets the phase offset. Phase value range: 0-4095 (0 to 360 degrees). | | colspan="2" | Sets the phase offset. Phase value range: 0-4095 (0 to 360 degrees). | ||
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===SetWaveform=== | ===SetWaveform=== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''SetWaveform''' | ||
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| colspan="2" | Sets the output waveform type: 0=Sine, 1=Triangle, 2=Square | | colspan="2" | Sets the output waveform type: 0=Sine, 1=Triangle, 2=Square | ||
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==Property reference== | ==Property reference== | ||
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| width="90%" | | width="90%" class="mtx-class-macrohead" | '''Properties''' | ||
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| colspan="2" | External clock frequency in Hz. Typical values: 25000000 (25 MHz) for AD9833, 75000000 (75 MHz) for AD9834. | | colspan="2" | External clock frequency in Hz. Typical values: 25000000 (25 MHz) for AD9833, 75000000 (75 MHz) for AD9834. | ||
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| width="10%" align="center" | | width="10%" align="center" class="mtx-class-propfolder" | [[File:Fc9-conn-icon.png]] | ||
| width="90%" | | width="90%" class="mtx-class-propfolder" | SPI Connections | ||
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| colspan="2" | Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device. | | colspan="2" | Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device. | ||
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| width="90%" | | width="90%" class="mtx-class-propfolder" | Simulation | ||
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Latest revision as of 14:37, 13 July 2026
| Author | Matrix TSL |
| Version | 1.0 |
| Category | Analog Output |
DDS DAC (AD9834/AD9833) component
Component to drive AD9834 and AD9833 Direct Digital Synthesis (DDS) waveform generator ICs via SPI interface. These devices can generate sine, triangle, and square wave outputs with programmable frequency and phase. Compatible with AD9833 and AD9834 devices.
Detailed description
No detailed description exists yet for this component
Examples
Auto Detect Port Number
This example auto detects and opens a COM Port based on preassigned USB Identifiers VID/PID.
For a known device the VID and PID can be found via Windows device manager.
Macro reference
DisableOutput
|
DisableOutput |
| Disables the DDS output (puts device in sleep mode). | |
 - VOID
|
Return |
EnableOutput
|
|
EnableOutput |
| Enables the DDS output. | |
| - VOID
|
Return |
Initialise
|
|
Initialise |
| Initializes the SPI bus and resets the DDS device. Call this once at startup. | |
| - VOID
|
Return |
Reset
|
|
Reset |
| Resets the DDS device. This clears all registers and stops output. | |
| - VOID
|
Return |
SetFrequency
|
|
SetFrequency |
| Sets the output frequency in Hz. Frequency range depends on clock frequency (typically 0 Hz to ClockFreq/2). | |
 - ULONG
|
Frequency |
| Frequency in Hz | |
 - BYTE
|
Register |
| Frequency register to use: 0 or 1 | |
| - VOID
|
Return |
SetPhase
|
|
SetPhase |
| Sets the phase offset. Phase value range: 0-4095 (0 to 360 degrees). | |
 - UINT
|
Phase |
| Phase value: 0-4095 (0 to 360 degrees) | |
| - BYTE
|
Register |
| Phase register to use: 0 or 1 | |
| - VOID
|
Return |
SetWaveform
|
|
SetWaveform |
| Sets the output waveform type: 0=Sine, 1=Triangle, 2=Square | |
| - BYTE
|
WaveformType |
| Waveform type: 0=Sine, 1=Triangle, 2=Square | |
| - VOID
|
Return |
Property reference
|
Properties |
|
Device Type |
| Selects which DDS device is connected. | |
|
Clock Frequency |
| External clock frequency in Hz. Typical values: 25000000 (25 MHz) for AD9833, 75000000 (75 MHz) for AD9834. | |
|
SPI Connections |
|
|
Channel |
| SPI Channel selector | |
|
|
Prescale |
| Prescale option selector | |
|
MOSI |
| SPI Data Out Pin SDO - Also Known as Master Out Slave In (MOSI) when used in Master mode. | |
|
|
MOSI Remap Pin |
| Select which the target pin to assign the MOSI hardware pin functionality. | |
|
|
MISO |
| SPI Data In Pin SDI - Also Known as Master In Slave Out (MISO) when used in Master mode. | |
|
|
MISO Remap Pin |
| Select which the target pin to assign the MISO hardware pin functionality. | |
|
|
CLK |
| SPI Clock Pin CLK - The Clock signal is driven by the SPI master. | |
|
|
CLK Remap Pin |
| Select which the target pin to assign the CLK hardware pin functionality. | |
|
|
CS / SS |
| Chip Select / Slave Select Pin Master Mode: General purpose output pin used to select the remote SPI device. Slave Mode: Hardware chip select pin input used to select the SPI device. | |
|
|
Simulation |
|
Simulate Comms |
Component Source Code
Please click here to download the component source project: FC_Comp_Source_DAC_AD9834_AD9833.fcfx
Please click here to view the component source code (Beta): FC_Comp_Source_DAC_AD9834_AD9833.fcfx