Component: HBRIDGE (CAL) (Misc)

Author	Matrix TSL
Version	2.1
Category	Misc

HBRIDGE component

CAL = Code Abstraction Layer - Allows one code base to run on a wide range of chips. A low level implementation giving direct access to the H-Bridge peripheral. Currently only supports compatible 8-bit PIC devices.

Version information

Library Version, Component Version, Date, Author, Info
5, 2.1, 04-11-24, BR, Added pin caption to the remap port pin selection property
6, 2.1, 04-11-24, BR, Cleaned up pin caption from none remap port pin property
7, 2.1, 15-07-25, BR, Sorted the remap pin properties by port pin

Detailed description

Half Bridge Application

A Half Bridge type output has two output signals A and B.

Full Bridge Application

Full Bridge type output has four output signals A, B, C and D.

Examples

A simple proof of concept example to drive a full bridge output with varying speed and direction.

PIC16F1937 H-Bridge Example

PIC16F18877 H-Bridge Example

Macro reference

Disable

	Disable
Disable this PWM Channel
- VOID	Return

Enable

	Enable
Enable this PWM Channel
- VOID	Return

GetList

	GetList
Returns CHANNEL or PRESCALE list from the FCD and updates the internal property
- STRING	Name
- STRING	Return

GetValue

	GetValue
Returns Named property Value
- STRING	Name
- STRING	Return

SetDirection

	SetDirection
Set the motor direction.
- BYTE	direction
0 = Forwards, 1 = Reverse
- VOID	Return

SetSpeed

	SetSpeed
Sets the motor speed by varying the PWM duty.
- UINT	duty
Duty value 0 - 1023
- VOID	Return

SetValue

	SetValue
Sets the Value of the property PERIOD, PRESCALE or CHANNEL (if CHANNEL also updates the PORT from FCD)
- STRING	Name
- STRING	Value
- VOID	Return

Property reference

	Properties
	Enable
	Settings
	Channel
PWM Channel selector
	Mode
Selects between full bridge and half bridge output modes. Some H-Bridge channels may only have one mode in which case the property selector will only show the available mode.
	Polarity
Selects the active output voltage. Active high - Pins will be low when inactive and high when active. Active Low- Pins will be high when inactive and low when active.
	Timer
Timer associated with PWM to drive the output. Warning - All PWM channels linked to the same timer will share the same period and prescaler settings.
	Prescaler Divide
Prescaler Divider value
	Period Register
Defines the resolution of the PWM duty mark/space ratio. PWM duty can be between 0 (0%) and period (100%).
	Dead Band
	Rising Bits
Number of bits assigned to the rising edge dead band counter. Auto populated based on selected target chip.
	Falling Bits
Number of bits assigned to the falling edge dead band counter. Auto populated based on selected target chip.
	Rising Count
Number of cycles to wait after a falling edge and before a rising edge.
	Falling Count
Number of cycles to wait after a rising edge and before a falling edge.
	Connections
	A Pin
Output Pin A
	B Pin
Output Pin B
	C Pin
Output Pin C
	D Pin
Output Pin D
	A Remap Pin
Remap Pin A - Specifies the pin used for the A output. Only available on devices supporting remappable hardware pins.
	B Remap Pin
Remap Pin B - Specifies the pin used for the B output. Only available on devices supporting remappable hardware pins.
	C Remap Pin
Remap Pin C - Specifies the pin used for the C output. Only available on devices supporting remappable hardware pins.
	D Remap Pin
Remap Pin D - Specifies the pin used for the D output. Only available on devices supporting remappable hardware pins.
	Calculations
	Clock Speed
Target Microcontroller Clock Speed.
	Period (uS)
Calculated length of PWM period in micro seconds.
	Frequency (KHz)
Calculated PWM output frequency in KHz.
	Frequency (Hz)
Calculated PWM output frequency in Hz.

Component Source Code

Please click here to download the component source project: FC_Comp_Source_HBRIDGE.fcfx

Please click here to view the component source code (Beta): FC_Comp_Source_HBRIDGE.fcfx