Component: Input ADC (DSP Inputs)

Author	Matrix Ltd
Version	1.2
Category	DSP Inputs

Input ADC component

Allows the values from a buffer to be assigned driectly from an analog enabled pin. Either a single sample at a time or a number of samples. Auto scales the digital value to fill the entire range of the specified buffer type.

Component Source Code

Please click here for the component source code: FC_Comp_Source_DSP_ADCInput.fcfx

Detailed description

No detailed description exists yet for this component

Examples

No additional examples

Downloadable macro reference

	AddSample
Adds a single ADC sample to the current location in the specified buffer. If Auto Scale is enabled then the sample will be scaled to correctly fit inside the buffer. Auto increments current location.
- VOID	Return

	AddSampleArray
Adds a single ADC sample to the current location in the specified buffer. If Auto Scale is enabled then the sample will be scaled to correctly fit inside the buffer. Auto increments current location.
- UINT	SampleDelay
Number of us in between each sample.
- VOID	Return

Property reference

	Properties
	Buffer Size
Number of individual elements the buffer can store, default 1.
	Buffer Type
Sets the buffer data type, data is automatically scaled to fit and make full use of the data type.
	Connections
	Channel
Analogue Input Channel - Which pin is the analogue input connected to?
	Settings
	Auto Adjust Scale
Yes: Automatically convert ADC samples to match the full bit depth of the DSP buffer. No: Leave the ADC samples at the native bit depth.
	VRef option
Defines what is used as the ADC maximum reference. ADC Range = GND to VRef Voltage VDD - Defines the microcontrollers power supply pin as the max reference, VREF+ Pin - Dedicated pin on the microcontroller to allow for a variable reference voltage.
	Conversion speed
Clock setting to select how fast the ADC peripheral will perform an ADC conversion. The FRC setting is based on a RC time base and so will vary with temperature and pressure. Other settings are generally based on divisions of the master clock.
	Acquisition cycles
Number of micro seconds to wait for the ADC input to charge before starting the analogue sample.
	Bit Depth
Maximum number of bits for each ADC sample.